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    SubjectRe: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102
    > The Cyrix 6x86MX has a fully compatible TSC implementation. However, it
    > also allows turning off the CPU when a Halt state is entered, something

    No it does not. The intel specification explicility guarantees no time
    stamp will be repeated within 10 years under any circumstance. So cyrix
    almost has it right

    > The mod above also ignores the Centaur C6.

    > if ((boot_cpu_data.x86_capability & 16) && (boot_cpu_data.x86_vendor !=
    > X86_VENDOR_CYRIX) && (boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR)) {

    This is also slightly wrong. Only step 0 of the centaur C6 has the RDTSC
    power bug according to the errata documents. I think it should read
    the above + if the CENTAUR case & stepping==0)

    That sound right ?


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