Messages in this thread | | | Subject | Re: faster strcpy() | From | Benny Amorsen <> | Date | 27 Apr 1998 19:10:04 +0200 |
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>>>>> "RvR" == Rik van Riel <H.H.vanRiel@phys.uu.nl> writes:
RvR> Strictly speaking, the NexGens and the K6 are RISC processors RvR> with an embedded x86 JIT compiler/interpreter.
With that definition the good old 6510 in a C64 is a RISC processor. Remember microcode?
RISC is defined by the instruction set, not the implementation. A processor using the x86 instruction set can never be RISC, no matter the implementation
Benny
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