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SubjectRe: [PATCH] APM support doesn't compile with binutils 2.8.1.0.24
Date
> 
>
> On Wed, 25 Mar 1998, H. J. Lu wrote:
>
> > Can someone please tell me the correct opcode for "pushl %ds"
> > and by what increment esp is changed by "pushl %ds"?
>
> 80484a9: 1e pushl %ds <=== 32 bit PUSH
> 80484aa: 66 1e pushl %ds <=== 16 bit PUSH
>
> 32 bit push increments esp by 4. 16 bit push increments by 2. At least on
> the P54C/S5 i have.
>
> current GAS behavior:
>
> ASM("pushb %ds");
> ASM("pushw %ds");
> ASM("pushl %ds");
> ASM("push %ds");
>
> generates:
>
> 80484a9: 1e pushl %ds
> 80484aa: 66 1e pushl %ds
> 80484ac: 1e pushl %ds
> 80484ad: 1e pushl %ds
>

binutils 2.8.1.0.25:

# gcc -c b.s
b.s: Assembler messages:
b.s:1: Warning: warning: register does not match opcode suffix
b.s:3: Warning: warning: register does not match opcode suffix
# objdump -d b.o

b.o: file format elf32-i386

Disassembly of section .text:

00000000 <.text>:
0: 1e pushl %ds
1: 1e pushl %ds
2: 1e pushl %ds
3: 1e pushl %ds

I will fix "movl" and make "movb" an error.


--
H.J. Lu (hjl@gnu.ai.mit.edu)

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