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SubjectRe: [PATCH] APM support doesn't compile with binutils 2.8.1.0.24
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> In short:
>
> push %ds : legal, should default to 32-bit mode, no override

Does esp really change by 4 with opcode "0x1e" or "0x661e"?

> pushl %ds : legal, 32-bit, no override
> pushw %ds : legal, 16-bit, operand size override
> pushb %ds : illegal
>
> mov %ds,%eax : legal, should default to 32-bit mode, no override

FYI, binutils 2.8.1.0.25 doesn't allow it. I can fix it in
2.8.1.0.26. But according to Intel, the 2 high order bytes
may be undefined in eax. I decide not to change it unless
it is absolutely necessary.

> mov %ds,%ax : if gas notices that "%ax" is 16-bit it would be great.

Yes, it does.

> movw %ds,%ax : 16-bit, operand size override REQUIRED

Why? binutils 2.8.1.0.25 optimizes it out. Intel says the override
is NOT REQUIRED.

> movl %ds,%eax : 32-bit, no override
>

It is the same as "mov %ds,%eax" in 2.8.1.0.25.

> When moving to memory (pushw and movw to memory) the 16-bit override _may_
> be optimized away, but as explained above it definitely may NOT be
> optimized away when moving to a register because the behaviour is very
> different (I don't know whether the segment checks are for 16- or 32-bit
> entities, though, so maybe even the mov-to-memory case is different).
>

Which Intel manual are you using? Mine explicitly says the 16-bit
override is not required when moving data bewteen a segment register
and a general purpose register.

H.J.

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