Messages in this thread | | | Date | Fri, 20 Mar 1998 14:42:56 +0000 (GMT/BST) | From | Mike Jagdis <> | Subject | Re: SMP speed on 6x86 UP |
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On Fri, 20 Mar 1998, MOLNAR Ingo wrote:
> On Fri, 20 Mar 1998, Kurt Garloff wrote: > > > The 6x86 is configured using the processor ports 0x22 and 0x23. Mike Jagdis > > told me, that the APIC on Intels do use these registers. So, I consider this > > to be the most probable candidate for the problem. > > yep, if the BIOS lets us so far, this explains things. Could you try > removing the setup_IO_APIC(); line from smp.c? Does this fix the problem?
A quick look at arch/i386/kernel/smp.c suggests that if an MP table exists at all we will make some writes to low I/O space (some would definitely clobber a 6x86 too but I haven't followed the code paths that closely).
The implication is that motherboard manufacturers are perhaps standardizing the BIOS' they are shipping and non-SMP boards are advertising a single CPU MP table.
My quick suggestion would be to change the "if (!smp_found_config)" test in smp_boot_cpus() to test the processor make as well and fail anything that isn't Intel.
N.B. It took me longer to write this message than I spent looking at the code - that's all the time I get for lunch :-).
Mike
-- .----------------------------------------------------------------------. | Mike Jagdis | Internet: mailto:mike@roan.co.uk | | Roan Technology Ltd. | | | 54A Peach Street, Wokingham | Telephone: +44 118 989 0403 | | RG40 1XG, ENGLAND | Fax: +44 118 989 1195 | `----------------------------------------------------------------------'
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