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SubjectRe: 2.1.131-ac3 3c509 no irq_save in the sender code
Hi,

On Wed, 9 Dec 1998 07:35:46 +0100 (CET), Andrea Arcangeli
<andrea@e-mind.com> said:

> Ok, but now I can' t understand why the tx can be interrupted by the rx
> irq handler in UP safely but not in SMP... What am I mussing here?

On UP, the interrupt code is atomic. An interrupt may interfere with
a running tx routine, but the tx code can never interfere with an
interrupt routine.

On SMP, the interrupt may be taken on a different CPU. Interrupt and
tx code can execute _in parallel_, so the assumption that the
interrupt code is atomic breaks.

This is why running the driver with SMP on 2.0 works OK: on 2.0, if an
interrupt comes in on another CPU, that interrupt is either forced to
wait on the global kernel spinlock, or it gets forwarded to the cpu
which currently holds the kernel lock. The interrupt and
(kernel-lock-protected) tx code can never run in parallel. 2.1 has
more parallelism in its SMP, which makes all the difference.

--Stephen


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