Messages in this thread | | | Date | Sat, 14 Nov 1998 16:31:51 -0800 | From | "David S. Miller" <> | Subject | Re: Accessing MMIO PCI space - crossplatform |
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Date: Fri, 13 Nov 1998 20:41:48 +0100 (MET) From: Gerard Roudier <groudier@club-internet.fr>
I dislike the PCI addressing implementation in SPARC64 because it does not use the FLAT model. This is pain in the ass since BUS addresses are different from the CPU and from devices that are on the BUS, and PCI base registers are to be converted to/from CPU, etc..., etc...
Was it really not possible to make things clean for PCI on SPARC (i.e. is it a constraint of SUN's implementation of PCI) ?
BTW, it is a question, not a flame.
Well, let me put it this way, how would you implement the capability to put 100 PCI busses on a system? This is what the Sun method is trying to do.
PCI base registers only need to be converted because when you want to speak of "raw PCI MEM I/O address from devices point of view" you must account for the fact that the CPU sees each PCI bus in a different part of the physical address space. Consider the fact that we put actual cpu view address into base register a side effect of the fact that it is the simplest way to encode "PCI bus instance" into such a value.
So please propose a PCI addressing implementation that allows more than 1 PCI bus in the system and does not have the "problems" you see in sparc64 method :-) BTW, Alpha has something similar on multi-PCI bus machines and last I checked they were going to make it work the same way we did on sparc64.
Later, David S. Miller davem@dm.cobaltmicro.com
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