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    SubjectRe: [OFFTOPIC] UltraSparc MMU problems
    David S. Miller wrote:

    > Date: Tue, 27 Oct 1998 21:35:16 +1100
    > From: Richard Gooch <>
    > David S. Miller writes:
    > > Solaris's TLB miss strategy is pretty hopeless...
    > What does the OS have to do with it? Once the TLB's are set up, why
    > does the OS need to intervene?
    > If the OS uses a stupid scheme to replace a missing TLB entry and uses
    > inefficient tables as backing store for mappings, it will thrash the
    > L2 cache.
    > Note that Solaris and some other svr4 folks swap page tables out to
    > disk when memory is tight... when they get tapped back in you might
    > not get the nice cache patterns you had before...

    Note: Richard said it got FASTER after the pageout-pagein operation!!
    Thus, you now have a more efficient set etc. than before!!!

    The only thing I think of that would make it FASTER (after the
    pageout/pagein), is that Soalris only page back the needed pages, as needed,
    and thus could be more optimized than before... ie. the spread across memory
    could be less than before the pageout/pagein.

    Richard, do try the following (And tell us the results please):
    Repeat your operation as before, but after that:
    - reload the dataset from disk etc. (Thus clearing out the current in memory
    copy with a fresh copy)
    - re-render and time

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