Messages in this thread | | | Date | Wed, 23 Jul 1997 12:57:58 +0200 (MET DST) | From | Ingo Molnar <> | Subject | Re: About ioremap() and L2-Cache |
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On Wed, 23 Jul 1997, Systemkennung Linux wrote:
> > about the PWT bit. if it's needed, __ioremap(flags) can be called with any > > caching flag. (which will be written into the page table entry). Is there > > any RL use for the PWT bit? > > It might be interesting for clearing pages etc. to avoid unecessary > dirtying the caches where the probability of the data being used again > is relativly small. A bit a different cache trick speeds up the > performance of clear_page() on MIPS by a factor of two.
yep, although the pentium does not write-allocate cachelines so there it's not a problem.
The PPro does, there it makes sense to set up a 'page clearing' window somewhere in the virtual memory space, and map the to-be-cleared page to that address. (this mapping will be fast with invlpg).
[unlinke the MIPS case here we have to be careful with 4MB pages stuff on pentiums and higher, clear_page() usually points to a bigpage-mapped memory address, which we cannot and should not remap, but rather we should use a page clearing window]
If MTRR's are used, then no need to set up such a window, as MTRR's are working on the physical memory level.
-- mingo
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