Messages in this thread | | | Date | Fri, 9 May 1997 14:47:55 +0200 | From | Martin Mares <> | Subject | Re: [PATCH] NMI trap revised (was Re: NMI errors in 2.0.30??) |
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Hi,
> My references say that bits 6 and 7 of port 0x61 are valid only if you set bits > 2 and 3 to one. Bit 2 controls RAM parity error and bit 3 controls IO parity. To > set this up, you have to say something like: > outb( inb_p(0x61) | 0x0C, 0x61);
AFAIK bits 6 and 7 are valid even if bits 2 and 3 are not set, but in such cases you receive no NMI.
> but I didn't find this in the kernel anywhere, so your code may not do anything.
The kernel should _not_ enable these bits as it would break lots of systems having non-parity memory.
Martin
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