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SubjectRe: ISA bus and SLOW_DOWN_IO
On Mon, 26 May 1997 Eric.Schenk@dna.lth.se wrote:

>
> "Richard B. Johnson" <root@analogic.com> writes:
> >The problem is that we need 300 to 600 ns! BogoMips isn't going to do it.
> >It is true that we are back to the clock-speeds of the uP, but the RAM
> >stack access times dominate. Anything greater than 600 nanoseconds wastes
> >time. Anything less than 300 may result in the glitches. This does not
> >have to be very accurate.
>
> But we should be able to use the same principle. On at 33Mhz 486 we
> get about 20 clock ticks in 600ns. When we are talking a 200Mhz Pentium
> we are looking at 120 clock ticks. We should be able to calabrate a small
> bit of loop code so that it takes about 600ns on pretty much anything
> that will run Linux. Say use a 16Mhz 386 as the worst case. I assume
> that even that slow a processor can make it once around a countdown loop
> in 10 clock ticks.
>
> (Or did one of slip a decimal somewhere here?)
>
> --
> Eric Schenk www: http://www.dna.lth.se/~erics
> Dept. of Comp. Sci., Lund University email: Eric.Schenk@dna.lth.se
> Box 118, S-221 00 LUND, Sweden fax: +46-46 13 10 21 ph: +46-46 222 96 38
>
I didn't work the numbers, nano is 9, mega (usual clock speeds) is 6.
With a 33MHZ bus-clock, thats 1/33*10^6seconds = 33 ns per clock. It
takes 4 clock cycles to do practically anything so you have 33 * 4 = 132 ns
just to set up a BogoMIPS value so I would guess that before you started
counting anything, you would have used up the 300 ns you want to waste.

On the average, register to register is 2 clocks, memory to register is
4 clocks (nothing fancy here). The internal clock may be *2 for a DX/66
but it doesn't count for RAM access which isn't going to be faster than
what it says on the chips.

With a baseline of 33MHz, you can scale all the times to match your
processor clock and fudge for the different cycle times for the Pn series,
etc. I think that by the time you started counting anything, your time
is up.

If the time you need to waste must be effective before you've booted
the machine, i.e., you need to slow down I/O for an ancient disk drive, etc.,
you lose.

Now pusha/popa is is way too conservative. It will waste 800 ns on my
166 MHz Pentium (cycle counter) and 1.4 microseconds on my 486/DX-66. This
has to be measured with a 'scope. Note, you don't really have to
calculate these things... you have a printer port on your machine...

(1) Set bit 0 on the printer port.
(2) Reset bit 0 on the printer port.
(3) Loop forever.

(4) Using a 'scope, measure the waveform period looking at bit 0
on the printer port.
(5) Record this time. It will be subtracted from your measurments

(6) Put the code you want to test, between (1), and (2) above.
(7) Subtract (5). That's how much time it takes.

To remove the jitter, disable interrupts.

You will discover that the reference manual is wrong. But it's not
always wrong in the "Marketing" direction! With code executing within
a "cache-line", you can make some instruction times disappear.


While I remember... Someone inquired about port addresses above 0xffff.
The CPU only sees 0-ffff, the PCI bridge does it. The point being that
when it does it, it keeps the result off the ISA bus.


Cheers,
Dick Johnson
-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
Richard B. Johnson
Project Engineer
Analogic Corporation
Voice : (508) 977-3000 ext. 3754
Fax : (508) 532-6097
Modem : (508) 977-6870
Ftp : ftp@boneserver.analogic.com
Email : rjohnson@analogic.com, johnson@analogic.com
Penguin : Linux version 2.1.40 on an i586 machine (66.15 BogoMips).
Warning : I read unsolicited mail for $350.00 per hour. Supply billing address.
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