Messages in this thread | | | Date | Fri, 7 Feb 1997 21:52:51 -0500 | From | "Theodore Y. Ts'o" <> | Subject | Re: MMX for kernel |
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Date: Fri, 7 Feb 1997 20:56:51 -0500 From: "David S. Miller" <davem@jenolan.rutgers.edu>
I don't know, it seems to me the most sensible place to do all this is indeed in the kernel when the user touches the fpu himself the first time. We can provide whatever initial state is mandated on a particular architecture.
This is in fact what we do now on the Sparc, provide a zero floating point status register, and all fpu registers set to "all 1's" (aka signaling NAN's).
David, you're right of course --- that's the right way to do things. I'm not sure why it wasn't done that way on Intel platforms. Probably due to historical reasons, the FPU registers were treated like the CPU registers, and initialized as such, assuming that doing so was cheap.
- Ted
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