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From
SubjectRe: MMX performance....
Date
Followup to:  <Pine.LNX.3.95.970206160255.11244E-100000@waste.org>
By author: Oliver Xymoron <oxymoron@waste.org>
In newsgroup: linux.dev.kernel
> >
> > Hmm. I haven't had a chance to look at the MMX instruction set, but
> > I'll be shocked, SHOCKED, if the MMX instruction set doesn't have 64
> > bit memory transfer instructions. Perhaps a logical alternative would
> > be to implement the Pentium memcpy in terms of whichever FPU/MMX mode
> > was in effect at the time.
>
> I'd be shocked as well. Most of the core instruction times are listed as
> 1, and from what I can tell, it's just a hack on the already existing
> functional units in the FPU, taking advantage of the fast multiplier, etc.
>

My understanding was that the P55C actually have the FPU and MPU
completely separate, and that they actually have separate register
files which are then aliased from a software perspective (so FSAVE can
be used to save the MMX state.) The MPU is supposed to be dual-issue.

-hpa
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