Messages in this thread | | | From | (H. Peter Anvin) | Subject | Re: MSR support for x86 | Date | 28 Feb 1997 19:30:28 GMT |
| |
Followup to: <Pine.LNX.3.95.970228134013.272A-100000@localhost> By author: Stephan Meyer <sensei@wiesel.de> In newsgroup: linux.dev.kernel > > > one more thing. What do you think, where is the right place to put 'enable > > cache/disable cache' functionality? They are driven through the cr[0123] > > registers in the CPU, not through MSR. I think these two concepts should > > be integrated somehow. Maybe writing to offset 0123 should set cr[0123] > > (i would hard-coded mask off certain bits, nobody should be able to > > disable paging accidentally :) > > This is an interesting suggestion :) > If we implement this, it should be tightly secured since any user could > mess around with the 2nd level cache. A possible application could be a > CPU manager! >
I think letting any non-root user messing with the MSRs or anything like that is asking for trouble in a big way. /dev/msr definitely should be a root-only device!
-hpa -- This space intentionally has nothing but text explaining why this space has nothing but text explaining that this space would otherwise have been left blank, and would otherwise have been left blank.
| |