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SubjectRe: [hardcntr] Harware counter per process support


On 27 Nov 1997, David Mentre wrote:

> > 2. Regarding implementation
>
> d. More control on the bits enabled in control register (mainly pin and
> apic control). (note from Dean Gaudet). But I would let the user to
> set/unset the enable bit, as he need to decide when to monitor events
> (in a specific routine for example).

What I meant is that the user's interface should include "enable/disable"
implicitly, you shouldn't let them play with the bits. For example:

struct event_select {
/* bit fields corresponding to event select fields */
};

struct counter_control {
struct event_select control[2];
};

struct counter_values {
unsigned long long counters[2];
unsigned long long tsc;
};

extern int sys_start_counting(struct counter_control *control);
extern int sys_stop_counting(void);
extern int sys_read_counters(struct counter_values *values);

But abstract the tsc a bit better :)

You can't let the user play with the apic bit because it's not quite safe,
it sets up recurring interrupts which the kernel may not be ready for.

Dean


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