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SubjectRe: [hardcntr] Harware counter per process support
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And a point I forgot:

David Mentre <David.Mentre@irisa.fr> writes:

> 2. Regarding implementation

d. More control on the bits enabled in control register (mainly pin and
apic control). (note from Dean Gaudet). But I would let the user to
set/unset the enable bit, as he need to decide when to monitor events
(in a specific routine for example).

d.

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