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SubjectRe: 2.1.63 - testing Pentium bug workaround..

On Thu, 13 Nov 1997, Todd Derr wrote:

> Even with the fix, the PTE for the first page of the IDT has to be in
> the TLB, otherwise we're right back in the same boat, right? (i.e. the
> CPU would have to read the PTE from memory...)

probably (i'm wildly speculating here), the bug is that the pentium puts a
LOCK onto the memory bus while it reads the IDT[trap] descriptor ... and
it forgets to give that LOCK line back. Now, you have to issue a LOCK line
for reading a descriptor (it's 8 bytes), but you dont have to do it when
reading a PTE. A PTE is only 4 bytes, which 32 bits is an atomic memory
bus transaction anyway. And PTE reading happens _before_ reading the
descriptor ... this small window enables us to do the page fault based
workaround.

but i guess this remains an Intel secret forever.

-- mingo


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