Messages in this thread | | | Date | Sat, 4 May 2024 16:41:36 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH v2 08/16] x86/mce/amd: Clean up enable_deferred_error_interrupt() |
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On Mon, Apr 29, 2024 at 10:18:59AM -0400, Yazen Ghannam wrote: > Good idea. In fact, we can treat this register as read-only, since we will > only handle (SUCCOR && SMCA) systems. The only need to write this register > would be on !SMCA systems. > > We need to assume that the register value will be identical for all CPUs. This > is the expectation, but I'll add a comment to highlight this. > > Also, we don't need the entire register. We just need the LVT offset fields > which are 4 bits each.
Yes, you could read out and sanity-check only the LVT offsets and make they're the same across all cores to make sure BIOS hasn't dropped the ball in programming them.
But see my previous mail too: I think we should leave pre-Zen as it is and do cleanups and simplifications only for Zen and newer.
Thx.
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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