Messages in this thread Patch in this message | | | Date | Fri, 17 May 2024 17:38:03 +0000 | Subject | [PATCH v3 2/2] doc: swiotlb: Document SWIOTLB areas parameter | From | "T.J. Mercier" <> |
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Commit 20347fca71a3 ("swiotlb: split up the global swiotlb lock") added the ability to specify the number of SWIOTLB areas, but boot-options.rst was not updated as part of that commit. Also adjust the swiotlb option syntax to clarify that force and noforce are mutually exclusive.
Reported-by: Michael Kelley <mhklinux@outlook.com> Fixes: 20347fca71a3 ("swiotlb: split up the global swiotlb lock") Signed-off-by: T.J. Mercier <tjmercier@google.com> --- Documentation/arch/x86/x86_64/boot-options.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/arch/x86/x86_64/boot-options.rst b/Documentation/arch/x86/x86_64/boot-options.rst index a37139d1752f..d54e636f91f7 100644 --- a/Documentation/arch/x86/x86_64/boot-options.rst +++ b/Documentation/arch/x86/x86_64/boot-options.rst @@ -287,9 +287,11 @@ iommu options only relevant to the AMD GART hardware IOMMU: iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU implementation: - swiotlb=<slots>[,force,noforce] + swiotlb=[<slots>][,<areas>][, [force] | [noforce] ] <slots> Prereserve that many 2K slots for the software IO bounce buffering. + <areas> + Number of SWIOTLB areas with their own lock. Must be a power of 2. force Force all IO through the software TLB. Hardware IOMMU implementations can use SWIOTLB bounce buffering in -- 2.45.0.rc1.225.g2a3ae87e7f-goog
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